Regviz

Espressif Systems /ESP32-S3 /SYSTEM /CPU_PERI_CLK_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CPU_PERI_CLK_EN

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-S3/SYSTEM/CPU_PERI_CLK_EN#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLK_EN_ASSIST_DEBUG)CLK_EN_ASSIST_DEBUG 0 (CLK_EN_DEDICATED_GPIO)CLK_EN_DEDICATED_GPIO

Description

cpu_peripheral clock configuration register

Fields

CLK_EN_ASSIST_DEBUG

Set 1 to open assist_debug module clock
CLK_EN_DEDICATED_GPIO

Set 1 to open dedicated_gpio module clk

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data